A 3.3 fF/mm² 40 V BST MIM capacitor suitable for above MMIC integration

Satoshi Horiuchi, Katsuji Matsumoto, Mariko Sakachi, Tsuyoshi Ooki,

Hideko Nakamura, Kiwamu Adachi, and Mamoru Shinohara

Semiconductor Technology Development Group, Semiconductor Business Unit, Sony Corporation

4-14-1 Asahi-chow, Atsugi-shi, Kanagawa, 243-0014 Japan

E-mail: Satoshi.Horiuchi@jp.sony.com, TEL: +81-462-30-5529

Keywords: MIM capacitor, BST, Triple-layered structure, Leakage current, Two-step deposition

Abstract

A high performance metal-insulator-metal (MIM) capacitor with Ba_(1-x)Sr_xTiO₃ (BST) films deposited at 200°C is presented for the first time. Through a detailed analysis of the relationship between BST crystallographic structures and its electrical characteristics, a triple-layered BST structure was found to be effective in suppressing leakage current and hence increasing breakdown voltage while maintaining a high capacitance density. By using the triple-layered BST structure, an excellent MIM capacitor with a capacitance density of 3.3 fF/mm², a breakdown voltage of 40 V and an insertion loss below 0.05 dB has been successfully obtained. This MIM capacitor can be easily integrated into conventional microwave monolithic integrated circuits (MMICs).

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