Development of a GaN Transistor Process for Linear Power Applications

A.W. Hanson, R. Borges, J.D. Brown, J.W. Cook, Jr., T.Gehrke, J.W. Johnson, K. Linthicum, S. Peters, E. Piner, P. Rajagopal, J.C. Roberts, S. Singhal, R. Therrien, A. Vescan,

Netronix Corporation, 628 Hutton St., Suite 106, Raleigh, NC 27606, USA

ahanson@nitronex.com, Telephone: 919-807-9100

 

Keywords: AlGaN/GaN HFET, GaN-on-Si, Power Transistor

 

Abstract

This paper provides an overview of the Nitronex power transistor process and discusses in detail the approaches taken to optimize performance for 28V linear applications.  More specifically, key process performance metrics are traced through several generations of baseline process, highlighting some of the challenges met along the way, and concluding with a summary of product level performance achievements made possible with the current generation platform.

 

 

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