Cbc Reduction in Si-implanted Subcollector HBTs
M. Sun, P.J. Zampardi,
R.L. Pierson, M.Y. Chen**, M. –C. Ho***, and S.
Fitzsimmons, Rockwell Scientific Company,
Email: email@example.com Phone: (805)480-4456
*R. Lee is currently with Vitesse Semiconductor,
We demonstrate the first small area emitter (1.4 x 3 mm2) N-p-n AlGaAs/GaAs HBT’s fabricated with N+- implanted subcollectors in a high volume manufacturing environment. The subcollector region was defined by multiple N+ implants of various doses and energies on a semi-insulating GaAs substrate, and the remaining HBT layers were grown by MOCVD. To evaluate the impacts of Cbc reduction, devices with varying subcollector areas were fabricated for comparison. Small signal s- parameter data was measured to extract fT, fmax and C bc. By varying the implanted subcollector area, the base-collector capacitance C bc a was reduced by almost 40% using this manufacturable process. The common emitter current gain of devices fabricated by this implant/epitaxial hybid process is about 50 which is similar to our baseline device, indicating good material quality using this technique.