Volume Epitaxial
Growth of Enhanced Mode HIGFETs using Minimal Material Characterization and
Rapid Inline Processing to Minimize Risk
Michael Pelczynski,
Mark Rittgers, Bob Duffin, Celicia Della-Morrow, Mikhail Mikhov*
Motorola Inc. Semiconductor
Product Sector, Test and Manufacturing, CS-1
Tel: (480) 413-3121
Email: mike.pelczynski@motorola.com
Department
of Electrical Engineering,
Keywords: HIGFET, EMODE, epitaxial growth, MOCVD,
OMVPE.
Abstract:
Previously, our
epi-manufacturing group has reported on the growth of enhancement mode HIGFETs
for cell phone applications [1]. Since that report two Emcore E-450 Turbo-Disk
reactors have been installed capable of 5x6-inch growth. Both reactors are qualified to run the
HIGFET product with a combined maximum average output of between 900-1000
wafers/week. The original single wafer epitaxial growth tool output was about
150 HIGFET wafers/week. There is a significant possibility of increased scrap
events from improper epi due to the increased output of the two reactors, the
difficulty in projecting the device electrical parameters from the finished
epi, and the length of time between insertion in the line and
initial test results. Our
enhanced mode HIGFET structure (EMODE) is a fully depleted structure [2, 3] and
does not lend
itself to many standard
production-oriented characterization techniques. Typically, one would use Hall,
photoluminescence
(PL) [4], and/or x-ray
measurements to analyze this type of structure (with higher grown-in charge).
These methods have limited correlation in this case [5]. Therefore, to minimize
risk, we have developed a basic set of non-destructive characterization tools
and coupled it with rapid processing to get initial electrical data. We use a
Lehighton measurement coupled with a PL measurement as a pass/fail test after
growth. The range and value of the
Lehighton measurement can give us information about the charge level in the epi
structure in general. We can then use the full-width-at-half-max value of the
PL spectra to get information about the amount of the charge in the channel
region. In this way we can tell the amount and general location of charge in
the structure. Neither test is sufficiently accurate to measure electrical
performance absolutely, but is instead useful as a go-no-go to the next
step. Once the wafers pass the initial
testing they are put into the process line. Rapid in-line results are obtained
in four days, which give initial electrical parameter results. Based on these
electrical results the wafers are qualified or downgraded.